A 125 mm 2 1 Gb NAND flash memory with 10 MB/s program throughput

Hiroshi Nakamura*, Kenichi Imamiya, Toshihiko Himeno, Toshio Yamamura, Tamio Ikehashi, Ken Takeuchi, Kazushige Kanda, Koji Hosono, Takuya Futatsuyama, Koichi Kawai, Shirota Riichiro, Norihisa Arai, Fumitaka Arai, Kazuo Hatakeyama, Hiroaki Hazama, Masanobu Saito, Hisataka Meguro, Kevin Conley, Khandker Quader, Jian Chen

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

8 Scopus citations

Abstract

A 125 mm 2 1 Gb NAND flash memory with 10 MB/s program throughput was presented. The 1 Gb flash has the highest memory density among 2LC memories and the highest cell/chip efficiency among flash memories. Two techniques were adopted in the architecture for reducing the chip size, the number of memory cells in a NAND string was changed to 32 and each word line (WL) crossed (1024+32)×16 bit lines.

Original languageEnglish
Pages (from-to)106-107+450+99
JournalDigest of Technical Papers - IEEE International Solid-State Circuits Conference
DOIs
StatePublished - 1 Jan 2002
Event2002 IEEE International Solid-State Circuits Conference - San Francisco, CA, United States
Duration: 3 Feb 20027 Feb 2002

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