A 125μW, fully scalable MPEG-2 and H.264/AVC video decoder for mobile applications

Tsu Ming Liu*, Ting An Lin, Sheng Zen Wang, Wen Ping Lee, Kang Cheng Hou, Jiun Yan Yang, Chen-Yi Lee

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

24 Scopus citations

Abstract

An MPEG-2 and H.264/AVC decoder occupies 3.9×3.9mm2 in 0.18μm 1P6M CMOS. To improve integration efficiency and transmission bandwidth, a scalable pipeline and prediction circuit is employed. The decoder performs real-time MPEG-2 and H.264/AVC QCIF at 15frames/s video decoding, dissipating 108μW and 125μW, respectively, at 1V with a clock frequency of 1.15MHz.

Original languageEnglish
Title of host publication2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
StatePublished - 1 Dec 2006
Event2006 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, United States
Duration: 6 Feb 20069 Feb 2006

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN (Print)0193-6530

Conference

Conference2006 IEEE International Solid-State Circuits Conference, ISSCC
CountryUnited States
CitySan Francisco, CA
Period6/02/069/02/06

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    Liu, T. M., Lin, T. A., Wang, S. Z., Lee, W. P., Hou, K. C., Yang, J. Y., & Lee, C-Y. (2006). A 125μW, fully scalable MPEG-2 and H.264/AVC video decoder for mobile applications. In 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers [1696212] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).