A 10-bit area-efficient DAC with voltage-average technique for LCD column driver applications

Chih Wen Lu, Ching Min Hsiao

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper proposes a 10-bit area-eificient DAC with a voltage-average technique, comprising a 6-bit RDAC, a voltage-average circuit, and a new 4-bit DAC-embedded op-amp. The maximum DNL and INL were measured as 0.58 LSB and 0.88 LSB, respectively. The proposed 10-bit DAC occupies only 75% that of conventional 8-bit RDACs.

Original languageEnglish
Title of host publication23rd International Display Workshops in conjunction with Asia Display, IDW/AD 2016
PublisherSociety for Information Display
Pages2049-2050
Number of pages2
ISBN (Electronic)9781510845510
StatePublished - 2018
Event23rd International Display Workshops in conjunction with Asia Display, IDW/AD 2016 - Fukuoka, Japan
Duration: 7 Dec 20169 Dec 2016

Publication series

Name23rd International Display Workshops in conjunction with Asia Display, IDW/AD 2016
Volume4

Conference

Conference23rd International Display Workshops in conjunction with Asia Display, IDW/AD 2016
CountryJapan
CityFukuoka
Period7/12/169/12/16

Keywords

  • Column driver
  • Digital-to-analog converter (PAC)
  • LCD

Fingerprint Dive into the research topics of 'A 10-bit area-efficient DAC with voltage-average technique for LCD column driver applications'. Together they form a unique fingerprint.

Cite this