A 1-V-input switched-capacitor voltage converter with voltage-reference- free pulse-density modulation

Xin Zhang*, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya

*Corresponding author for this work

Research output: Contribution to journalArticle

8 Scopus citations

Abstract

A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the hot-carrier injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μ;A-10 mA output current range.

Original languageEnglish
Article number6205614
Pages (from-to)361-365
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume59
Issue number6
DOIs
StatePublished - 1 Jun 2012

Keywords

  • Offset canceling
  • pulse-density modulation (PDM)
  • switched capacitor (SC)
  • voltage converter
  • voltage reference

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