A 1-V 100-dB dynamic range 24.4-kHz bandwidth delta-sigma modulator

Chia Ling Chang, Jieh-Tsorng Wu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

A 2-1 MASH delta-sigma modulator (DSM) was fabricated using a 90nm CMOS technology. Operating at 6.25 MHz clock rate, this chip consumes 860 μW under a 1 V supply. The over-sampling ratio is 128, and the signal-bandwidth is 24.4 kHz. This chip achieves a performance of 88 dB SNDR and 90 dB SNR. Its dynamic range is 100 dB. The chip area is 0.44 mm2.

Original languageEnglish
Title of host publication2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
Pages813-816
Number of pages4
DOIs
StatePublished - 9 Sep 2013
Event2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China
Duration: 19 May 201323 May 2013

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
CountryChina
CityBeijing
Period19/05/1323/05/13

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