A 0.1-/spl mu/m delta-doped MOSFET fabricated with post-low-energy implanting selective epitaxy

K. Noda, T. Tatsumi, T. Uchida, K. Nakajima, H. Miyamoto, Chen-Ming Hu

Research output: Contribution to journalArticlepeer-review

63 Scopus citations

Abstract

A simple fabrication technology for delta-doped MOSFETs, named post-low-energy implanting selective epitaxy (PLISE) is presented. The PLISE technology needs no additional photo-lithography mask, deposition step or etching step even for CMOS devices. The only additional step is growing undoped epitaxial channel layers by UHV-CVD after the channel implantation. With this technology, delta-doped NMOSFETs with 0.1-/spl mu/m gate length were successfully fabricated. By optimizing the epi-layer thickness and the channel doping level, short-channel effects are suppressed enough to achieve 0.1-/spl mu/m gate length. Moreover, the junction capacitance at zero bias is reduced by 50%.

Original languageEnglish
Article number662780
Pages (from-to)809-814
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume45
Issue number4
DOIs
StatePublished - 1 Dec 1998

Keywords

  • Epitaxial growth
  • MOSFET's
  • silicon

Fingerprint Dive into the research topics of 'A 0.1-/spl mu/m delta-doped MOSFET fabricated with post-low-energy implanting selective epitaxy'. Together they form a unique fingerprint.

Cite this