77-110GHz 90nm-CMOS receiver design

Jo Han Judy Yu, Chien Hsiung Liao, Cheng Huang Hsieh, Shu-I Hu, Dow Chih Niu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations


This manuscript details our latest 90nm CMOS W-band receiver design where the RF LNA, resistive mixer, IF differential amplifier and LO tripler have been integrated, thus allows the whole 77-110GHz spectrum to be down-converted into quasi-DC -33GHz using a much lower microwave frequency. In addition to being used in our broadband receiver array project, this W-band circuit is also eligible for the conventional 77/94GHz vehicular and surveillance applications. This 90nm-CMOS receiver with LO tripler has around -0.4dB conversion gain, 18dB noise figure, 48dB LO-IF isolation, and its chip size is 950-times-750μm 2 , with 114mW power dissipation at 1.3V DC bias.

Original languageEnglish
Title of host publication2013 Asia-Pacific Microwave Conference Proceedings, APMC 2013
Number of pages3
StatePublished - 1 Dec 2013
Event2013 3rd Asia-Pacific Microwave Conference, APMC 2013 - Seoul, Korea, Republic of
Duration: 5 Nov 20138 Nov 2013

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC


Conference2013 3rd Asia-Pacific Microwave Conference, APMC 2013
CountryKorea, Republic of


  • CMOS
  • millimeter-wave
  • mixer
  • MMIC
  • receiver
  • tripler
  • W-band

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    Yu, J. H. J., Liao, C. H., Hsieh, C. H., Hu, S-I., & Niu, D. C. (2013). 77-110GHz 90nm-CMOS receiver design. In 2013 Asia-Pacific Microwave Conference Proceedings, APMC 2013 (pp. 233-235). [6695104] (Asia-Pacific Microwave Conference Proceedings, APMC). https://doi.org/10.1109/APMC.2013.6695104