65dBHD3 CMOS tunable OTA with mobility reduction compensation

Shih Tung Cheng*, Wei Hsiu Chang, Chung-Chih Hung

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a high linearity operational transconductance amplifier (OTA) base on the technique of mobility reduction compensation, which achieves great linearity improvement and has wide input range at low power consumption. The third-order harmonic distortion (HD3) of the OTA is about 65dB at 1MHz for a 1.2-V pp differential input. The OTA was designed by the TSMC 0.18-μm CMOS process technology. For 1.8-V supply voltage, the static power consumption is only 0.427mW.

Original languageEnglish
Title of host publicationProceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011
Pages358-361
Number of pages4
DOIs
StatePublished - 28 Jun 2011
Event2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011 - Hsinchu, Taiwan
Duration: 25 Apr 201128 Apr 2011

Publication series

NameProceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011

Conference

Conference2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011
CountryTaiwan
CityHsinchu
Period25/04/1128/04/11

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