5.5 GHz low voltage and high linearity RF CMOS mixer design

Senhg Feng Lu; Jyh-Chyurn Guo

doi:10.1109/EMICC.2008.4772256

5.5 GHz low voltage and high linearity RF CMOS mixer design

Senhg Feng Lu, Jyh-Chyurn Guo

Department of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

A CMOS mixer was design with a new circuit scheme to realize low voltage and high linearity simultaneously. A double balanced Gilbert cell was adopted as the basic topology and TSMC 0.18μm 1P6M CMOS process was employed for the on-chip RF circuit fabrication. The proposed new circuit scheme consists of LC-tanks as a capacitively coupled resonator for low voltage and multi-stage parallel RC networks for linearity improvement. Furthermore, multi-gated structure is applied at the RF input as a transconductance amplifier to enhance conversion gain and linearity. The new circuit scheme enables a successful low voltage operation at 1-V for 0.18|a.m technology. The measured circuit performance demonstrates superior linearity with IIP3 of 11 dBm and PldB of 2.2 dBm. The conversion gain can be maintained at 8.1 dB in a wide frequencies of 5GHz to 6.8GHz.

Original language	English
Title of host publication	2008 European Microwave Integrated Circuit Conference, EuMIC 2008
Pages	171-174
Number of pages	4
DOIs	https://doi.org/10.1109/EMICC.2008.4772256
State	Published - 1 Dec 2008
Event	2008 European Microwave Integrated Circuit Conference, EuMIC 2008 - Amsterdam, Netherlands Duration: 27 Oct 2008 → 31 Oct 2008

Publication series

Name	2008 European Microwave Integrated Circuit Conference, EuMIC 2008

Conference

Conference	2008 European Microwave Integrated Circuit Conference, EuMIC 2008
Country	Netherlands
City	Amsterdam
Period	27/10/08 → 31/10/08

Access to Document

10.1109/EMICC.2008.4772256

Link to publication in Scopus

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Cite this

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title = "5.5 GHz low voltage and high linearity RF CMOS mixer design",

abstract = "A CMOS mixer was design with a new circuit scheme to realize low voltage and high linearity simultaneously. A double balanced Gilbert cell was adopted as the basic topology and TSMC 0.18μm 1P6M CMOS process was employed for the on-chip RF circuit fabrication. The proposed new circuit scheme consists of LC-tanks as a capacitively coupled resonator for low voltage and multi-stage parallel RC networks for linearity improvement. Furthermore, multi-gated structure is applied at the RF input as a transconductance amplifier to enhance conversion gain and linearity. The new circuit scheme enables a successful low voltage operation at 1-V for 0.18|a.m technology. The measured circuit performance demonstrates superior linearity with IIP3 of 11 dBm and PldB of 2.2 dBm. The conversion gain can be maintained at 8.1 dB in a wide frequencies of 5GHz to 6.8GHz.",

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Lu, SF & Guo, J-C 2008, 5.5 GHz low voltage and high linearity RF CMOS mixer design. in 2008 European Microwave Integrated Circuit Conference, EuMIC 2008., 4772256, 2008 European Microwave Integrated Circuit Conference, EuMIC 2008, pp. 171-174, 2008 European Microwave Integrated Circuit Conference, EuMIC 2008, Amsterdam, Netherlands, 27/10/08. https://doi.org/10.1109/EMICC.2008.4772256

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N2 - A CMOS mixer was design with a new circuit scheme to realize low voltage and high linearity simultaneously. A double balanced Gilbert cell was adopted as the basic topology and TSMC 0.18μm 1P6M CMOS process was employed for the on-chip RF circuit fabrication. The proposed new circuit scheme consists of LC-tanks as a capacitively coupled resonator for low voltage and multi-stage parallel RC networks for linearity improvement. Furthermore, multi-gated structure is applied at the RF input as a transconductance amplifier to enhance conversion gain and linearity. The new circuit scheme enables a successful low voltage operation at 1-V for 0.18|a.m technology. The measured circuit performance demonstrates superior linearity with IIP3 of 11 dBm and PldB of 2.2 dBm. The conversion gain can be maintained at 8.1 dB in a wide frequencies of 5GHz to 6.8GHz.

AB - A CMOS mixer was design with a new circuit scheme to realize low voltage and high linearity simultaneously. A double balanced Gilbert cell was adopted as the basic topology and TSMC 0.18μm 1P6M CMOS process was employed for the on-chip RF circuit fabrication. The proposed new circuit scheme consists of LC-tanks as a capacitively coupled resonator for low voltage and multi-stage parallel RC networks for linearity improvement. Furthermore, multi-gated structure is applied at the RF input as a transconductance amplifier to enhance conversion gain and linearity. The new circuit scheme enables a successful low voltage operation at 1-V for 0.18|a.m technology. The measured circuit performance demonstrates superior linearity with IIP3 of 11 dBm and PldB of 2.2 dBm. The conversion gain can be maintained at 8.1 dB in a wide frequencies of 5GHz to 6.8GHz.

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