5-6 GHz 9.4 mW CMOS direct-conversion passive-mixer receiver with low-flicker-noise corner

Yu Chih Hsiao*, Chin-Chun Meng, Jin Siang Syu, Chung Yo Lin, Shyh Chyi Wong, Guo Wei Huang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

This paper demonstrates a low-power and low-flicker-noise direct-conversion receiver using double-balanced passive mixer. The deep-n-well vertical-NPN bipolar junction transistor is placed as at the input stage of the IF amplifier to reduce the flicker noise in the 0.18 um standard CMOS process. As a result, conversion gain achieves 50-dB gain when the LO power is 10 dBm and the noise figure is 7-dB at 100 kHz. The totally power consumption is 9.4 mW at 1.8 V voltage supply.

Original languageEnglish
Title of host publicationEuropean Microwave Week 2012
Subtitle of host publication"Space for Microwaves", EuMW 2012, Conference Proceedings - 7th European Microwave Integrated Circuits Conference, EuMIC 2012
Pages301-304
Number of pages4
StatePublished - 1 Dec 2012
Event7th European Microwave Integrated Circuits Conference, EuMIC 2012 - Held as Part of 15th European Microwave Week, EuMW 2012 - Amsterdam, Netherlands
Duration: 29 Oct 201230 Oct 2012

Publication series

NameEuropean Microwave Week 2012: "Space for Microwaves", EuMW 2012, Conference Proceedings - 7th European Microwave Integrated Circuits Conference, EuMIC 2012

Conference

Conference7th European Microwave Integrated Circuits Conference, EuMIC 2012 - Held as Part of 15th European Microwave Week, EuMW 2012
CountryNetherlands
CityAmsterdam
Period29/10/1230/10/12

Keywords

  • direct-conversion receiver
  • low power
  • vertical-NPN bipolar junction transistor

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