For the first time, CMOS TFTs of 65nm channel length have been demonstrated by using a novel microwave dopant activation technique. A low temperature microwave anneal is demonstrated and discussed in this study. We have successfully activated the poly-Si gate electrode and source/drain junctions, BF2 for p-MOS TFTs and P31 for n-MOS TFTs at a low temperature of 320°C without diffusion. The technology is promising for high performance and low cost upper layer nanometer-scale transistors as required by low temperature 3D-ICs fabrication.
|Title of host publication||2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest|
|State||Published - 1 Dec 2009|
|Event||2009 International Electron Devices Meeting, IEDM 2009 - Baltimore, MD, United States|
Duration: 7 Dec 2009 → 9 Dec 2009
|Name||Technical Digest - International Electron Devices Meeting, IEDM|
|Conference||2009 International Electron Devices Meeting, IEDM 2009|
|Period||7/12/09 → 9/12/09|