A 3.5-ns 64K CMOS RAM operated at 77 K has been described. The chip was fabricated in a dual 0.5-μm gate polysilicon process optimized for low-temperature operation. The design features asynchronous receivers capable of interfacing low-voltage ECL signal levels. Liquid-nitrogen operation of the RAM offers higher-speed operation than previously reported at the 64K level of integration for any technology.
|Number of pages||2|
|State||Published - 1988|
|Event||1988 Symposium on VLSI Circuits - Digest of Technical Papers - Tokyo, Japan|
Duration: 22 Aug 1988 → 24 Aug 1988
|Conference||1988 Symposium on VLSI Circuits - Digest of Technical Papers|
|Period||22/08/88 → 24/08/88|