27Gbit/s AIGaAs/GaAs HBT 1:2 regenerating demultiplexer IC

K. Runge; J. L. Gimlett; R. B. Nubling; K. C. Wang; Mau-Chung Chang; R. L. Pierson; P. M. Asbeck

doi:10.1049/el:19911478

27Gbit/s AIGaAs/GaAs HBT 1:2 regenerating demultiplexer IC

K. Runge, J. L. Gimlett, R. B. Nubling, K. C. Wang, Mau-Chung Chang, R. L. Pierson, P. M. Asbeck

Department of Electronics Engineering

Research output: Contribution to journal › Article › peer-review

3 Scopus citations

Abstract

An experimental 27 Gbit/s 1:2 regenerating demultiplexer IC based on AlGaAs/GaAs HBTs has been implemented, which features an input sensitivity of 55 mV peak to peak and a phase marpn of 270° at the SONET STS-192 rate of 9·95 Gbit/s. The circuit was fabricated in a high current gain baseline HBT technology, and occupies an area of 115 × 1 mm².

Original language	English
Pages (from-to)	2389-2391
Number of pages	3
Journal	Electronics Letters
Volume	27
Issue number	25
DOIs	https://doi.org/10.1049/el:19911478
State	Published - 5 Dec 1991

Keywords

Demultiplexers
Digital communications
Integrated circuits

Access to Document

10.1049/el:19911478

Fingerprint Dive into the research topics of '27Gbit/s AIGaAs/GaAs HBT 1:2 regenerating demultiplexer IC'. Together they form a unique fingerprint.

Cite this

@article{103458c5f1fb4725986592603d47cad8,

title = "27Gbit/s AIGaAs/GaAs HBT 1:2 regenerating demultiplexer IC",

abstract = "An experimental 27 Gbit/s 1:2 regenerating demultiplexer IC based on AlGaAs/GaAs HBTs has been implemented, which features an input sensitivity of 55 mV peak to peak and a phase marpn of 270° at the SONET STS-192 rate of 9·95 Gbit/s. The circuit was fabricated in a high current gain baseline HBT technology, and occupies an area of 115 × 1 mm2.",

keywords = "Demultiplexers, Digital communications, Integrated circuits",

author = "K. Runge and Gimlett, {J. L.} and Nubling, {R. B.} and Wang, {K. C.} and Mau-Chung Chang and Pierson, {R. L.} and Asbeck, {P. M.}",

year = "1991",

month = dec,

day = "5",

doi = "10.1049/el:19911478",

language = "English",

volume = "27",

pages = "2389--2391",

journal = "Electronics Letters",

issn = "0013-5194",

publisher = "Institution of Engineering and Technology",

number = "25",

}

TY - JOUR

T1 - 27Gbit/s AIGaAs/GaAs HBT 1:2 regenerating demultiplexer IC

AU - Runge, K.

AU - Gimlett, J. L.

AU - Nubling, R. B.

AU - Wang, K. C.

AU - Chang, Mau-Chung

AU - Pierson, R. L.

AU - Asbeck, P. M.

PY - 1991/12/5

Y1 - 1991/12/5

N2 - An experimental 27 Gbit/s 1:2 regenerating demultiplexer IC based on AlGaAs/GaAs HBTs has been implemented, which features an input sensitivity of 55 mV peak to peak and a phase marpn of 270° at the SONET STS-192 rate of 9·95 Gbit/s. The circuit was fabricated in a high current gain baseline HBT technology, and occupies an area of 115 × 1 mm2.

AB - An experimental 27 Gbit/s 1:2 regenerating demultiplexer IC based on AlGaAs/GaAs HBTs has been implemented, which features an input sensitivity of 55 mV peak to peak and a phase marpn of 270° at the SONET STS-192 rate of 9·95 Gbit/s. The circuit was fabricated in a high current gain baseline HBT technology, and occupies an area of 115 × 1 mm2.

KW - Demultiplexers

KW - Digital communications

KW - Integrated circuits

UR - http://www.scopus.com/inward/record.url?scp=0026417480&partnerID=8YFLogxK

U2 - 10.1049/el:19911478

DO - 10.1049/el:19911478

M3 - Article

AN - SCOPUS:0026417480

VL - 27

SP - 2389

EP - 2391

JO - Electronics Letters

JF - Electronics Letters

SN - 0013-5194

IS - 25

ER -

27Gbit/s AIGaAs/GaAs HBT 1:2 regenerating demultiplexer IC

Abstract

Keywords

Access to Document

Other files and links

Cite this