TY - GEN
T1 - 183GHz 13.5mW/pixel CMOS regenerative receiver for mm-wave imaging applications
AU - Tang, Adrian
AU - Chang, Mau-Chung
PY - 2011/5/12
Y1 - 2011/5/12
N2 - Terahertz- and mm-Wave-based imagers have recently gained interest for imaging in security screening and bio-imaging applications [1,2]. For these applications to become practical, the core pixel circuits employed in an imaging array must meet challenging constraints that originate from the system level design and the needs of constructing large array structures on-chip. The most critical of these constraints is that the pixel must consume very low power, as an array will inflate the total power by n2, where n2 is the total number of pixels in a square (n x n) array. Pixel circuit area is the 2nd major constraint, as the single pixel area will be also inflated by n2. This area constraint is critical because the cost-effective pixel array should ideally fit on a wafer to facilitate monolithic fabrication and avoid the need for complicated mechanical assembly of multiple array sections. A third system-level constraint similar to that experienced in CMOS image sensor arrays is the challenge of routing large numbers of analog signals between each pixel in the array and the sampling ADC.
AB - Terahertz- and mm-Wave-based imagers have recently gained interest for imaging in security screening and bio-imaging applications [1,2]. For these applications to become practical, the core pixel circuits employed in an imaging array must meet challenging constraints that originate from the system level design and the needs of constructing large array structures on-chip. The most critical of these constraints is that the pixel must consume very low power, as an array will inflate the total power by n2, where n2 is the total number of pixels in a square (n x n) array. Pixel circuit area is the 2nd major constraint, as the single pixel area will be also inflated by n2. This area constraint is critical because the cost-effective pixel array should ideally fit on a wafer to facilitate monolithic fabrication and avoid the need for complicated mechanical assembly of multiple array sections. A third system-level constraint similar to that experienced in CMOS image sensor arrays is the challenge of routing large numbers of analog signals between each pixel in the array and the sampling ADC.
UR - http://www.scopus.com/inward/record.url?scp=79955723997&partnerID=8YFLogxK
U2 - 10.1109/ISSCC.2011.5746326
DO - 10.1109/ISSCC.2011.5746326
M3 - Conference contribution
AN - SCOPUS:79955723997
SN - 9781612843001
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 296
EP - 297
BT - 2011 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2011
Y2 - 20 February 2011 through 24 February 2011
ER -