1.2V and 8.6mW CMOS differential receiver front-end with 24dB gain and -11dBm IRCP

D. Huang*, R. Wong, C. Chien, Mau-Chung Chang

*Corresponding author for this work

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

A 60GHz CMOS differential receiver front-end has been demonstrated by using a novel transformer-folded-cascade (Origami) circuit architecture with high gain (24dB without buffer amplifier), high linearity (-11dBm input referred P 1dB compression point, or IRCP), low power dissipation (4.3mW/arm) and small die area (0.022mm 2 ).

Original languageEnglish
Pages (from-to)1449-1450
Number of pages2
JournalElectronics Letters
Volume42
Issue number25
DOIs
StatePublished - 20 Dec 2006

Fingerprint Dive into the research topics of '1.2V and 8.6mW CMOS differential receiver front-end with 24dB gain and -11dBm IRCP'. Together they form a unique fingerprint.

  • Cite this