@inproceedings{bd3292bf94d44068b1cb0a9ecb51f88e,
title = "120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs",
abstract = "High power density is a key point that power converters endeavor to pursue. However, it is rare that gate driver of power converter can switch under high supply voltage with a fast operation frequency. In this paper, a half-bridge driver with the slew rate enhancement (SRE) technique is proposed and its switching frequency can be increased to 25MHz under a 700V supply voltage. Besides, the proposed high voltage clamping circuit ensures all circuits operating in a safe region without any overvoltage problems in the bootstrap operation. With specifically developed high voltage high speed (HVHS) process, high-side and low-side circuits can be well shielded by the isolation well which is embedded in the level shifter device to minimize chip size.",
keywords = "bootstrap operation, high voltage clamping circuit, slew rate enhancement (SRE) technique",
author = "Yang, {Hsiang An} and Chiu, {Chao Chang} and Lai, {Shin Chi} and Chen, {Jui Lung} and Chang, {Chih Wei} and Meng, {Che Hao} and Ke-Horng Chen and Wey, {Chin Long} and Lin, {Ying Hsi} and Lee, {Chao Cheng} and Lin, {Jian Ru} and Tsai, {Tsung Yen} and Luo, {Hsin Yu}",
year = "2015",
month = oct,
day = "30",
doi = "10.1109/ESSCIRC.2015.7313884",
language = "English",
series = "European Solid-State Circuits Conference",
publisher = "IEEE Computer Society",
pages = "291--294",
editor = "Franz Dielacher and Wolfgang Pribyl and Gernot Hueber",
booktitle = "ESSCIRC 2015 - Proceedings of the 41st European Solid-State Circuits Conference",
address = "United States",
note = "null ; Conference date: 14-09-2015 Through 18-09-2015",
}