11.6GHz 1:4 demultiplexer with bit-rotation control and 6.1GHz auto-latching phase-aligner ICs

Mehran Bagheri, Keh Chung Wang, Mau-Chung Chang, Randy B. Nubling, Peter M. Asbeck, Andy Chen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

A 1:4 demultiplexer is reported which includes the following features: (1) output data unstaggered in time; (2) input clock with frequency equal to the input data bit rate; (3) bit pattern alignment capability; and (4) only the phases of input data and input clock aligned externally. The device uses a simple bit alignment scheme requiring only one external control signal. The demux and phase aligner use AlGaAs/GaAs HBT (heterojunction bipolar transistor) technology featuring emitter-up/single-heterojunction bipolar transistors, monolithically integrated Schottky diodes, NiCr thin-film resistors, MIM capacitors, and up to three levels of metal interconnect.

Original languageEnglish
Title of host publicationDigest Technical Papers - 1992 39th IEEE International Solid-State Circuits Conference, ISSCC 1992
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages94-95
Number of pages2
ISBN (Electronic)0780305736
DOIs
StatePublished - 1 Jan 1992
Event39th IEEE International Solid-State Circuits Conference, ISSCC 1992 - San Francisco, United States
Duration: 19 Feb 199221 Feb 1992

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume1992-February
ISSN (Print)0193-6530

Conference

Conference39th IEEE International Solid-State Circuits Conference, ISSCC 1992
CountryUnited States
CitySan Francisco
Period19/02/9221/02/92

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