10 bit 200 MSPS GaAs BiFET sample and hold circuit

J. Yu, S. Beccue, W. J. Ho, P. Zampardi, Mau-Chung Chang, K. C. Wang

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

A GaAs BiFET sample and hold circuit has been implemented and evaluated. SINAD (signal to noise and distortion) was measured to be ~60dB, but was limited by the test setup. The device accepts a differential input and produces a differential output. The S/H is clocked differentially at rates of up to 200MHz. 12 bit performance was expected from SPICE simulations. Despite our test setup limitations. 10 bit performance was observed at 200MSPS with an input signal frequency of 198MHz.

Original languageEnglish
Pages (from-to)1335-1337
Number of pages3
JournalElectronics Letters
Volume31
Issue number16
DOIs
StatePublished - 3 Aug 1995

Keywords

  • Field effect transistors
  • Sample and hold circuits

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