0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS

Po-Tsang Huang, Shu Lin Lai, Ching Te Chuang, Wei Hwang, Jason Huang, Angelo Hu, Paul Kan, Michael Jia, Kimi Lv, Bright Zhang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

In this paper, a 256×40 energy-efficient ternary content addressable memory (TCAM) macro is designed and implemented in 40nm low power (LP) CMOS. Due to the thicker gate oxide in LP process, a 16T TCAM cell with p-type comparison circuits is proposed to increase the Ion/Ioff difference of the dynamic circuitry. To further improve energy efficiency, don't-care-based ripple search-lines/bit-lines are used to reduce both the switching activities and wire capacitance. Moreover, column-based data-aware power control is employed for leakage power reduction and write-ability improvements. The experimental results show a leakage power reduction of 28.9%, a search-line power reduction of 31.74% and an energy efficiency metric of the TCAM macro of 0.339 fJ/bit/search.

Original languageEnglish
Title of host publicationProceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages129-132
Number of pages4
ISBN (Electronic)9781479940905
DOIs
StatePublished - 13 Jan 2015
Event2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 - Kaohsiung, Taiwan
Duration: 10 Nov 201412 Nov 2014

Publication series

NameProceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014

Conference

Conference2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014
CountryTaiwan
CityKaohsiung
Period10/11/1412/11/14

Keywords

  • Embedded memory
  • TCAM
  • energy-efficient

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