An investigation has been carried out to study the reduction of noise figure of silicon MOSFETs at 2GHz operation. It has been confirmed that reduction in gate length and the resistance of source and drain are effective to reduce the noise. Results suggest a high possibility of deep-submicron CMOS for application into RF front-end telecommunication ICs which have been conventionally produced by using mainly III-V devices.
|Number of pages||2|
|Journal||Digest of Technical Papers - Symposium on VLSI Technology|
|State||Published - 11 Jun 1996|
|Event||Proceedings of the 1996 Symposium on VLSI Technology - Honolulu, HI, USA|
Duration: 11 Jun 1996 → 13 Jun 1996