0.2μm analog CMOS with very low noise figure at 2 GHz operation

T. Ohguro; E. Morifuji; M. Saito; M. Ono; T. Yoshitomi; H. S. Momose; N. Ito; H. Iwai

doi:10.1109/VLSIT.1996.507821

0.2μm analog CMOS with very low noise figure at 2 GHz operation

T. Ohguro^*, E. Morifuji, M. Saito, M. Ono, T. Yoshitomi, H. S. Momose, N. Ito, H. Iwai

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Contribution to journal › Conference article › peer-review

20 Scopus citations

Abstract

An investigation has been carried out to study the reduction of noise figure of silicon MOSFETs at 2GHz operation. It has been confirmed that reduction in gate length and the resistance of source and drain are effective to reduce the noise. Results suggest a high possibility of deep-submicron CMOS for application into RF front-end telecommunication ICs which have been conventionally produced by using mainly III-V devices.

Original language	English
Pages (from-to)	132-133
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
DOIs	https://doi.org/10.1109/VLSIT.1996.507821
State	Published - 11 Jun 1996
Event	Proceedings of the 1996 Symposium on VLSI Technology - Honolulu, HI, USA Duration: 11 Jun 1996 → 13 Jun 1996

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abstract = "An investigation has been carried out to study the reduction of noise figure of silicon MOSFETs at 2GHz operation. It has been confirmed that reduction in gate length and the resistance of source and drain are effective to reduce the noise. Results suggest a high possibility of deep-submicron CMOS for application into RF front-end telecommunication ICs which have been conventionally produced by using mainly III-V devices.",

author = "T. Ohguro and E. Morifuji and M. Saito and M. Ono and T. Yoshitomi and Momose, {H. S.} and N. Ito and H. Iwai",

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journal = "Digest of Technical Papers - Symposium on VLSI Technology",

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T1 - 0.2μm analog CMOS with very low noise figure at 2 GHz operation

AU - Ohguro, T.

AU - Morifuji, E.

AU - Saito, M.

AU - Ono, M.

AU - Yoshitomi, T.

AU - Momose, H. S.

AU - Ito, N.

AU - Iwai, H.

PY - 1996/6/11

Y1 - 1996/6/11

N2 - An investigation has been carried out to study the reduction of noise figure of silicon MOSFETs at 2GHz operation. It has been confirmed that reduction in gate length and the resistance of source and drain are effective to reduce the noise. Results suggest a high possibility of deep-submicron CMOS for application into RF front-end telecommunication ICs which have been conventionally produced by using mainly III-V devices.

AB - An investigation has been carried out to study the reduction of noise figure of silicon MOSFETs at 2GHz operation. It has been confirmed that reduction in gate length and the resistance of source and drain are effective to reduce the noise. Results suggest a high possibility of deep-submicron CMOS for application into RF front-end telecommunication ICs which have been conventionally produced by using mainly III-V devices.

UR - http://www.scopus.com/inward/record.url?scp=0029717430&partnerID=8YFLogxK

U2 - 10.1109/VLSIT.1996.507821

DO - 10.1109/VLSIT.1996.507821

M3 - Conference article

AN - SCOPUS:0029717430

SP - 132

EP - 133

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

SN - 0743-1562

Y2 - 11 June 1996 through 13 June 1996

ER -

0.2μm analog CMOS with very low noise figure at 2 GHz operation

Abstract

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