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Personal profile

Research Interests

Digital IC design, memory circuits and memory sub-system design, hardware design for AI and machine learning acceleration, 3D-IC design (Monolithic 3D-IC & TSV 3D-IC)

Experience

Education/Academic qualification

PhD, National Chiao Tung University

External positions

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Projects

Accuracy-Aware Deep Neural Network with Computation-in-Memory and 3D-Memory Circuits

Huang, P.

1/08/2031/07/21

Project: Government MinistryMinistry of Science and Technology

Design of Ultra-High-Density Neural-Signal Acquisition Circuits with Optical Transmission

Huang, P.

1/08/1931/10/20

Project: Government MinistryMinistry of Science and Technology

Accuracy-Aware Deep Neural Network with Computation-in-Memory and 3D-Memory Circuits

Huang, P.

1/08/2231/07/23

Project: Government MinistryMinistry of Science and Technology

Accuracy-Aware Deep Neural Network with Computation-in-Memory and 3D-Memory Circuits

Huang, P.

1/08/2131/07/22

Project: Government MinistryMinistry of Science and Technology

Design of Ultra-High-Density Neural-Signal Acquisition Circuits with Optical Transmission

Huang, P.

1/08/1831/10/19

Project: Government MinistryMinistry of Science and Technology

Research Output

3D On-Demand Flying Mobile Communication for Millimeter Wave Heterogeneous Networks

Feng, K-T., Shen, L. H., Li, C. Y., Huang, P. T., Wu, S. H., Wang, L. C., Lin, Y. B. & Chang, M. C. F., Sep 2020, In : IEEE Network. 34, 5, p. 198-204 7 p.

Research output: Contribution to journalArticle

  • Energy-Efficient Accelerator Design with 3D-SRAM and Hierarchical Interconnection Architecture for Compact Sparse CNNs

    Lo, C. Y., Huang, P. T. & Hwang, W., Aug 2020, Proceedings - 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020. Institute of Electrical and Electronics Engineers Inc., p. 320-323 4 p. 9073944. (Proceedings - 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 神經訊號放大器及多通道神經訊號放大系統

    Huang, P-T. & Hwang, W., 11 Jan 2020, Patent No. I 682626

    Research output: Patent

    0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

    Chan, Y. S., Huang, P-T., Wu, S. L., Lung, S. C., Wang, W. C., Hwang, W. & Chuang, C. T., 17 Jan 2019, Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018. Sridhar, R., Alioto, M., Stan, M., Bhatia, K. & Li, H. (eds.). IEEE Computer Society, p. 67-71 5 p. 8618562. (International System on Chip Conference; vol. 2018-September).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 28nm 0.3V 1W2R Sub-Threshold FIFO Memory for Multi-Sensor IoT Applications

    Tseng, H. J., Huang, P. T., Wu, S. L., Lung, S. C., Wang, W. C., Hwang, W. & Chuang, C. T., Sep 2019, Proceedings - 32nd IEEE International System on Chip Conference, SOCC 2019. Zhao, D., Basu, A., Bayoumi, M., Hwee, G. B., Tong, G. & Sridhar, R. (eds.). IEEE Computer Society, p. 248-253 6 p. 9088094. (International System on Chip Conference; vol. 2019-September).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution