19992021

Research output per year

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Personal profile

Research Interests

Electronic Design Automation, Design and Analysis of Algorithms, Combinatorial Optimization

Experience

Education/Academic qualification

PhD, University of Texas at Austin

External positions

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Projects

Machine and Deep Learning Based Circuit and Layout Synthesis for

Chen, H.

1/08/2031/07/21

Project: Government MinistryMinistry of Science and Technology

EDA Solutions For Memory-Centric AI Edge: System Evaluation and Implementation for Reconfigurability

Chen, H.

1/11/1931/12/20

Project: Government MinistryMinistry of Science and Technology

Machine and Deep Learning Based Circuit and Layout Synthesis for

Chen, H.

1/08/2131/07/22

Project: Government MinistryMinistry of Science and Technology

Machine and Deep Learning Based Circuit and Layout Synthesis for Digital and Analog Designs

Chen, H.

1/08/1931/07/20

Project: Government MinistryMinistry of Science and Technology

Routing in Cyberphysical Active-Matrix Based Digital Microfluidic Biochips

Chen, H.

1/08/1831/07/19

Project: Government MinistryMinistry of Science and Technology

Research Output

A Design Flow for Micro Bump and Stripe Planning on Modern Chip-Package Co-Design

Huang, M. Y., Chen, H-M., Chen, K. N., Wu, S. H., Lee, Y. M. & Su, A. Y., Jun 2020, Proceedings - IEEE 70th Electronic Components and Technology Conference, ECTC 2020. Institute of Electrical and Electronics Engineers Inc., p. 2236-2241 6 p. 9159244. (Proceedings - Electronic Components and Technology Conference; vol. 2020-June).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Timing driven partition for multi-FPGA systems with TDM awareness

    Liou, S. H., Liu, S., Sun, R. & Chen, H. M., 20 Sep 2020, ISPD 2020 - Proceedings of the 2020 International Symposium on Physical Design. Association for Computing Machinery, p. 111-118 8 p. (Proceedings of the International Symposium on Physical Design).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Achieving routing integrity in analog layout migration via cartesian detection lines

    Chi, H. Y., Lin, Z. J., Hung, C. H., Liu, C. N. J. & Chen, H. M., Nov 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2019 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., 8942088. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2019-November).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • A Structure-Based Methodology for Analog Layout Generation

    Chen, Y. H., Chi, H. Y., Song, L. Y., Liu, C. N. J. & Chen, H. M., Jul 2019, SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 33-36 4 p. 8795227. (SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution