Projects per year
Personal profile
Research Interests
Sensor Interface Circuits, Data Converters, Phase-locked Loop and Frequency Synthesizer, High-speed Wireline Transceivers and Building Blocks, DC-DC Power Converters
Experience
2013/12~2014/11 Senior Analog Design Engineer, Mediatek USA
2015/8~2016/12 Staff Analog Design Engineer, Faraday Technology USA
2017/1~2018/8 Technical Manager, Egis Technology Inc.
2018/8~Assistant Professor, Electrical and Computer Engineering, National Chiao Tung University
Education/Academic qualification
PhD, Oregon State University
External positions
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Network
Projects
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High-Precision Micro-Power Analog-to-Digital Converters for IoT Sensor Interfaces
1/01/21 → 31/12/21
Project: Government Ministry › Ministry of Science and Technology
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High-Precision Micro-Power Analog-to-Digital Converters for IoT Sensor Interfaces
1/01/20 → 31/12/20
Project: Government Ministry › Ministry of Science and Technology
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High-Precision Micro-Power Analog-to-Digital Converters for IoT Sensor Interfaces
1/01/19 → 31/12/19
Project: Government Ministry › Ministry of Science and Technology
Research output
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A Two-Step Multi-Stage Noise-Shaping Incremental Analog-to-Digital Converter (Invited Paper)
Huang, J. S., Huang, Y. C., Kao, C. W., Hsu, C. W., Chiang, S. H. W. & Chen, C. H., Aug 2020, 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems, MWSCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 158-161 4 p. 9184542. (Midwest Symposium on Circuits and Systems; vol. 2020-August).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Robust continuous-time mash delta sigma modulator
Wang, Y., Shi, L., He, T., Zhang, Y., Chen, C-H. & Temes, G. C., 22 Jan 2019, 2018 IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018. Institute of Electrical and Electronics Engineers Inc., p. 310-313 4 p. 8624017. (Midwest Symposium on Circuits and Systems; vol. 2018-August).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A 16 b Multi-Step Incremental Analog-To-Digital Converter with Single-Opamp Multi-Slope Extended Counting
Zhang, Y., Chen, C-H., He, T. & Temes, G. C., 1 Apr 2017, In: IEEE Journal of Solid-State Circuits. 52, 4, p. 1066-1076 11 p., 7833069.Research output: Contribution to journal › Article › peer-review
Open Access -
A two-capacitor SAR-assisted multi-step incremental ADC with a single amplifier achieving 96.6 dB SNDR over 1.2 kHz BW
Zhang, Y., Chen, C-H., He, T., Sobue, K., Hamashita, K. & Temes, G. C., 26 Jul 2017, 38th Annual Custom Integrated Circuits Conference: A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017. Institute of Electrical and Electronics Engineers Inc., 7993660. (Proceedings of the Custom Integrated Circuits Conference; vol. 2017-April).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Incremental ADC with parallel counting
He, T., Chen, C-H., Zhang, Y. & Temes, G. C., 27 Sep 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017. Institute of Electrical and Electronics Engineers Inc., p. 1017-1020 4 p. 8053099. (Midwest Symposium on Circuits and Systems; vol. 2017-August).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review