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Personal profile

Research Interests

Sensor Interface Circuits, Data Converters, Phase-locked Loop and Frequency Synthesizer, High-speed Wireline Transceivers and Building Blocks, DC-DC Power Converters

Experience

2013/12~2014/11 Senior Analog Design Engineer, Mediatek USA

2015/8~2016/12 Staff Analog Design Engineer, Faraday Technology USA

2017/1~2018/8 Technical Manager, Egis Technology Inc.

2018/8~Assistant Professor, Electrical and Computer Engineering, National Chiao Tung University

Education/Academic qualification

PhD, Oregon State University

External positions

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