Projects per year
Personal profile
Research Interests
High-k Dielectric for Nanoscale Devices, Organic Thin-film-transistor & Memory, Nanocrystal Nonvolatile Memory, Post-Si High-mobility Channel MOSFET
Experience
Education/Academic qualification
PhD, National Chiao Tung University
External positions
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Network
Projects
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Research of the Vertical Stacked High Mobility Ge Channels Nanosheet Field Effect Transistor with High Quality Metal Doped into Interfacial Layer by Atomic Layer Deposition
1/08/20 → 31/07/21
Project: Government Ministry › Ministry of Science and Technology
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Process development of novel two-dimensional material: HfS2 andHfSe2 doping technology and device fabrication
1/08/20 → 31/07/21
Project: Government Ministry › Ministry of Science and Technology
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Technology Development of 4H-SiC Trench Gate MOSFET(3/3)
1/11/19 → 30/04/21
Project: Government Ministry › Ministry of Science and Technology
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Research of the Vertical Stacked High Mobility Ge Channels Nanosheet Field Effect Transistor with High Quality Metal Doped into Interfacial Layer by Atomic Layer Deposition
1/08/22 → 31/07/23
Project: Government Ministry › Ministry of Science and Technology
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Research of the Vertical Stacked High Mobility Ge Channels Nanosheet Field Effect Transistor with High Quality Metal Doped into Interfacial Layer by Atomic Layer Deposition
1/08/21 → 31/07/22
Project: Government Ministry › Ministry of Science and Technology
Research Output
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High-Accuracy Deep Neural Networks Using a Contralateral-Gated Analog Synapse Composed of Ultrathin MoS nFET and Nonvolatile Charge-Trap Memory
Chung, Y. Y., Cheng, C. C., Chou, Y. C., Chueh, W. C., Chung, W. H., Yu, Z., Hung, T. Y. T., Huang, L. Y., Wang, S. Y., Teng, L. C., Chang, W. H., Li, L. J. & Chien, C. H., Nov 2020, In: Ieee Electron Device Letters. 41, 11, p. 1649-1652 4 p., 9206053.Research output: Contribution to journal › Article › peer-review
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Impact of the Crystal Phase of ZrO on Charge Trapping Memtransistor as Synaptic Device for Neural Network Application
Chou, Y. C., Tsai, C. W., Yi, C. Y., Chung, W. H. & Chien, C. H., 2020, In: IEEE Journal of the Electron Devices Society. 8, p. 572-576 5 p., 9091548.Research output: Contribution to journal › Article › peer-review
Open Access -
Neuro-Inspired-in-Memory Computing Using Charge-Trapping MemTransistor on Germanium as Synaptic Device
Chou, Y. C., Tsai, C. W., Yi, C. Y., Chung, W. H., Wang, S. Y. & Chien, C-H., Sep 2020, In: IEEE Transactions on Electron Devices. 67, 9, p. 3605-3609 5 p., 9153812.Research output: Contribution to journal › Article › peer-review
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Study of E-Mode AlGaN/GaN MIS-HEMT with La-silicate Gate Insulator for Power Applications
Huang, K. N., Lin, Y. C., Lin, J. C., Hsu, C. C., Lee, J. H., Wu, C. H., Yao, J. N., Hsu, H-T., Nagarajan, V., Kakushima, K., Tsutsui, K., Iwai, H., Chien, C-H. & Chang, E. Y., Feb 2020, In: Journal of Electronic Materials. 49, 2, p. 1348-1353 6 p.Research output: Contribution to journal › Article › peer-review
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Study of tri-gate AlGaN/GaN MOS-HEMTs for power application
Huang, K. N., Lin, Y. C., Lee, J. H., Hsu, C. C., Yao, J. N., Wu, C. Y., Chien, C. H. & Chang, E. Y., Nov 2020, In: Micro and Nano Engineering. 9, 100073.Research output: Contribution to journal › Article › peer-review
Open Access